TTTC's Electronic Broadcasting Service

TTTC's Electronic Broadcasting Service

IEEE International High-Level Design Validation and Test Workshop
(HLDVT 2017)
October 5th 6th, 2017
Hilton Santa Cruz, Santa Cruz, California, U.S.A.

http://ihldvt.com/


CALL FOR PAPERS
Scope -- Submissions -- Key Dates -- Additional Information -- Committee
Scope
The 19th HLDVT workshop aims to bring together a community of researchers in the areas of design validation and test of hardware, software, cyber-physical systems, smart-systems, biological systems, and bio-chips. The workshop addresses the integration of multiple functions on-chip/in-system at higher levels of design abstraction, and the techniques and methodologies for modeling, analyzing, and validating such systems. In particular, the workshop has become a unique forum for researchers and practitioners to discuss the practical issues associated with validation of extremely large designs in the application fields of: automotive, communication, green computing, healthcare and biological systems. Topics of interest include, but are not limited to: Simulation-Based Validation Formal Verification, and Hybrid Methods Design Abstraction, and Behavioral Modeling Error Trace Interpretation, and Debugging Functional safety/safety-critical system verification On-Chip, and Core-Based Testing Test Generation for Defects, Design Errors, and Delay Faults Hardware/Software, and Mixed-Signal System Co-Validation Emulation, and Prototyping Post-silicon Validation, and Debug Modeling, Simulation and Verification of Cyber-Physical Systems Design and Test for AMS systems Variability, Reliability and Dependability management of SoCs.
Submissions	top
HLDVT invites researchers to submit "Work In Progress" (WIP) papers and "late-breaking" contributions. Industry practitioners and researchers are also invited to submit abstracts for presentations in the "Innovative Industrial Practices" (IIP) session. All submissions must be made electronically in PDF format using the submission web site: https://easychair.org/conferences/?conf=hldvt17. All accepted papers will be made available on IEEE Xplore.
Key Dates	top
"WIP"/"Late-breaking" papers due: August 20, 2017 "WIP"/"Late-breaking" paper acceptance notification: September 4, 2017 Final "WIP" papers and IIP presentation abstracts due: Sep 11, 2017
Additional Information	top
GENERAL INFORMATION: Prab Varma, Veda Design Systems, USA E-mail: prab@veritable.com PROGRAM INFORMATION: Franco Fummi, University of Verona, Italy franco.fummi@univr.it
Committee	top
HLDVT'17 ORGANIZING COMMITTEE (INCLUDES) General Chair: Prab Varma, Veda Design Systems, USA Program Chair: Franco Fummi, University of Verona, Italy Program Co-Chair: Sara Vinco, Politecnico di Torino, Italy, Special Sessions Chair: Zeljko Zilic, McGill University, Canada Tutorials Chair: Massimo Poncino, Politecnico di Torino, Italy Innovative Practices Chair: Avi Ziv, IBM Haifa, Israel Finance Chair: Vinod Viswanath, Real Intent, USA Publicity Chair: Robert Wille, Johannes Kepler University, Austria Industrial Liaison Chair: Eli Arbel, IBM Haifa, Israel Publications Chair: Namrata Shekhar, Synopsys, USA HLDVT'17 STEERING COMMITTEE Bernard Courtois, CMP-TIMA, France Masahiro Fujita, University of Tokyo, Japan Prab Varma, Veda Design Systems, U.S.A.
For more information, visit us on the web at: http://ihldvt.com/
HLDVT 2017 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).

IEEE Computer Society-Test Technology Technical Council

TTTC CHAIR
Chen-Huan CHIANG
Intel - USA
E-mail chen-huan.chiang@intel.com

PAST CHAIR
Michael NICOLAIDIS
TIMA laboratory - France
E-mail michael.nicolaidis@imag.fr

TTTC 1ST VICE CHAIR
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

SECRETARY
Joan FIGUERAS
Un. Politec. de Catalunya - Spain
E-mail figueras@eel.upc.es

TEST WEEK COORDINATOR
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Paolo BERNARDI
Politecnico di Torino - Italy
E-mail paolo.bernardi@polito.it

STANDARDS
Rohit KAPUR
Synopsys, Inc. - USA
E-mail rkapur@synopsys.com

EUROPE
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

PRESIDENT OF BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR
Adith SINGH
Auburn University â USA
E-mail adsingh@eng.auburn.edu

TTTC 2ND VICE CHAIR
Rohit KAPUR
Synopsys, Inc. â USA
E-mail rkapur@synopsys.com

FINANCE
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC
Kazumi HATAYAMA
NAIST - Japan
E-mail k-hatayama@is.naist.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
E-mail champac@inaoep.mx

NORTH AMERICA
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

This message contains public information only. You are invited to copy and distribute it further.

For more information contact the TTTC office or visit http://tab.computer.org/tttc/

To remove or modify your contact information, or to register new users, please click here and follow the on-line instructions.